The Computer Architecture Group at the University of Zaragoza (gaZ) is a research group whose core are professors at the Department of Computer and Systems Engineering (DIIS) at the University of Zaragoza integrated into the Engineering Research Institute of Aragon (I3A).
The common factor in our reserach is the search for simple mechanisms related to software and hardware memory hierarchy present in processors and multiprocessors. Our goal is to achieve higher speed, lower power consumption and ensure minimum response time. Our research projects are mainly financed by public agencies. We participate in Society of Architecture and Computer Technology (SARTECO), that is engaged in scientific and technological devolpment of our country in relation to this field of research.
We have been recongnized by the Autonomous Community of Aragón as research group (emerging in 2003 and consolidated since 2004). We are also member of the European Network of Excellence HiPEAC (High-Performance and Embedded Architecture and Compilation).
The Computer Architecture group of the University of Zaragoza (gaZ) is involved in technology transfer and applied research.
The intended recipients of technology transfer are companies and research groups requiring non-conventional software optimization or design. Examples are real-time embedded systems, hard-to-extract parallelism, or energy-oriented program optimization. Innovative execution platforms, such as multicore chips, GPGPUs or FPGAs are within our field of knowledge.
Our applied research focuses on the memory hierarchy of the future multicore chips. Several market segments are covered, from hard real-time processors to massive parallel engines or inexpensive embedded devices. We usually test our design proposals by executing real applications under full-system simulation.
Group leader: Víctor Viñals-Yúfera
Contact - Enrique Torres: enrique.torres at unizar.es